VK001 Post-Si ValidationHW101x · silicon 1.0

TC_SARADC_0002 · SARADC_REG_RW

SARADC ยท SARADC

In development 0 passed · 0 failed · 0 of 1 expected results
Run on
25-Aug-2026 15:35:07
Report generated on
29-Oct-2026 14:00:06
Silicon revision
1.0
Board
VAAK001 RevA
Firmware commit
unknown
Log
Features
Vin sweep test
Test description
  • Verify default register values after reset
  • Pattern write/read verification on RW registers
  • Read-only register validation for STS
  • Reserved bits write protection check across registers
  • Random read/write validation on RW registers
  • Invalid address access generates PSLVERR
  • Byte, half-word, and word access verification (hsize/pstrb)
  • Multi-reset sequence validation (C_RESET1 to C_RESET4)
Pass / fail criteria
-
Results
ConfigurationResult
No TEST_RESULT lines found in runtime.log
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